Need for DFT

                     Functional verification will ensure that our circuit will work for all possible combinations of inputs. But what guarantee whether our manufacturing vendor has done his job perfectly ? DFT can help in this regard. We build test logic into our chip so that we can test the functional logic blocks for any design manufacturing defects. Our test logic should ensure 100% coverage so that we can say 100% that the chip is free from any manufacturing defects.

                     As the technology scales down, the smaller geometries are becoming difficult to realize and therefore the number of manufacturing defects are rising. DFT becomes an important technique to ensure all our shipments are defect free. Without the DFT test, no customer will be willing to buy our chip because when he uses the defected chip in his product he will loose the customer loyalty and good name.

                     Some of the manufacturing defects that we might expect are,

• Nodes may get shorted to power or ground.
• Dust particles can cause disconnections in the electrical paths.
• Short circuits may happen between source and drain of transistors.

Improving Tester Time :

         DFT is not just about providing the possibility of testing the chip for the manufacturing defects but also developing the test vectors that would otherwise save valuable tester time. Every chip out of the fab needs to be tested for manufacturing defects. Tester is a equipment facility that would do the testing of the chip. The time taken for the tester to test a chip is very important factor in the cost of the chip. Because tester times is very costly. The tester is usually referred to as Automatic test Equipment(ATE). These ATEs also log the test diagnostics that would help in identifying the source of the fault thereby preventing it in the manufacturing process itself.

                   
Yield improvements :

         DFT is tightly coupled with the yield of the technology used for manufacturing. Yield is the number of defect free chips in the total chips manufactured. During the ramp of next technology nodes there might be situation when there is zero yield. During that time DFT diagnostics play an very important role in identifying the failure points. 

           

Functional Debug :

          DFT infrastructure that is built into the chip can also be used for functional debug. For example if the chip is executing an assembly code and stuck at the some point, the functional clock can be stoped and chip can be put to test mode and all the state values of the important registers can be shifted out for debugging. Without DFT infra it would be otherwise very difficult to debug functional failures on silicon.

Here is one video lecture regarding DFT overview :