Types of Timing Analysis

 We can perform timing closure on a digital circuit by two ways,

• Dynamic simulation
• Static timing analysis.

Dynamic simulations : 

                This is similar to the functional verification but the delay values of the circuit elements are considered. This is not exhaustive since it depends on the test vectors. Test vectors cannot stimulate all the possible paths. It is very time consuming to simulate the whole circuit for timing analysis. One of the advantages of dynamic timing analysis over the static timing analysis is that it is well suited for asynchronous interface timing. Static timing analysis cannot handle asynchronous timings.
                          Dynamic timing analysis can be run using the tools like Modelsim from Mentor graphics and VCS from synopsys.

Static timing analysis : 

                This method does not require test vectors. It does not check the functionality of the circuit. It can only check the timing of the circuit. All possible paths are taken into consideration and each path is analyzed in its worst possible scenario. It is very very fast compared to dynamic simulation. Because of this advantages it became the widely used method of timing closure in the IC designs. However dynamic simulation is also performed but just for sanity purpose and also only very few test cases are run (Gate Level Simulation).
                  The most popular tool used for timing analysis is Primetime from Synopsys.