System on a chip (SoC)

       

              System on a chip concept is very important for the evolution of the future devices. Earlier each function of the system is implemented in separate chips. The evolution of personal computers is an example for the system on chip concept. In earlier days the processor was a separate chip and all other functions like graphics, IO's, WLAN etc are implemented separate chips. But nowadays the duopoly companies Intel and AMD is in a race to integrate as many functions into a single chip thereby simplifying the system cost and complexity. Current SOC's of AMD integrate CPU, GPU and IO in a single chip. Qualcomm is the preferred supplier of chipsets for the high end smart phones because it of its integration of the communication IP in its application processors. Intel has integrated an on-chip voltage regulator. Integration like this make Original Equipment Manufactures (OEM) to come up with new designs. 

                 Though the SOC concept provides lot of advantages it introduces a lot of complexities for the chip manufacturers. Various IPs need to be made work in same process nodes, manage power dissipation etc. SOCs indeed reduce the overall power consumption of the system. Chip manufacturing technology is also one of the contributor for the SOC concept. Every two years the number of transistors in a die of same size would double itself. This tempts the chip manufacturers to add more and more features into their chip sets there by differentiating them-self from their competitors. The concept of integrated graphics in PC microprocessor chips is a clear example stating this trend. Advancements in the manufacturing technology which i witnessed from 65nm to 20nm has made chip manufactures rethink about their architectures. Many SOCs nowadays have multiple cores for compute rather that one core in earlier days. This is in one way of taking advantage of the silicon down scaling. 

                    The picture here bellow shows the Nvdia's Tegra SoC for tablets. What we could see here is apart from the ARM processor it has got a image processor, GeForce Graphics processor unit and other bunch of connectivity IPs. This we call it a system on a chip. Gradually every bit of the motherboard is pulled into the integrated circuit thereby making the devices miniaturization and improve the performance.

                            

                                                   Pic : Tegra SOC . Courtesy : Nvdia                      

                       The ultimate beneficiaries of the system on a chip concept are the end consumers. The toatl cost of the device comes down exponentially with highly integrated SOCs. Also the reliability and the performance of the device is greatly improved. Power consumption of the system can be reduced substantially by integrating more and more of the functions into the single SOC. The SOC concept should not be confused with SIP (System in Package). SIP has many integrated circuits kept in a single packaging. usually the integrated circuits are stacked vertically. 3D packaging techniques have been developed to stack many integrated circuits one above the other. SOC concept have more advantages than compared to SIPs.
                         SOC concept is the future of integrated circuits. Ultimately all the functionality will be fabricated in a single silicon chip giving rise to a new era of electronic devises. Soon we might see embedded able chips that can offset human disabilities like vision, sense etc. 

Power Dissipation basics

                    The three main goals in chip design are timing, area and power. But because of the raise in mobile phones and smartphones the battery life of handheld devices became a major selling point in the market rather than the speed of the processor and area. Hence an architect of the chip must design the chip with minimum power dissipation possible. There are many techniques for reducing the total power and peak power dissipation. Before that we need to understand the cause for the power dissipation and the parameters involved in it. Based on the parameters that contribute to the power dissipation we might find some techniques that can be employed to reduce the power. 

                     
                       

Spread Spectrum Clocking to reduce EMI

                      Before we jump into the technique of spread spectrum clocking, let us understand why it it been used so widely. All the electronic devices emits Electro-magnetic radiation. This electro magnetic radiation can interfere with the surrounding systems like other on-board systems, radio, TV etc. Because of this governments across the world have been regulating the amount of EMI (Electro Magnetic Interference) an electronic system can emit. EMI can interrupt, degrade or reduce the performance of the system. These can cause simple degradation of the data to the total loss of the data. 

                    Electro magnetic radiation in digital systems can in many cases exceed the regulatory guidance because of the periodic nature of the signals. Clocks in the digital systems are periodic. It means they have a fixed frequency. Because of the fixed frequency, the radiated power has peak values. This due to the harmonics. Continuous repeated radiations builds up harmonics that amplifies the radiated power which can cause severe noise interference to the surrounding systems. Hence the solution we can think of is to avoid the periodicity (fixed frequency). You might wonder how can we implement this. Nowadays SSC (Spread Spectrum Clocking) has become widely used method to reduce the peak EMI power. 

In the picture above the radiated power concentrates in one particular frequency. Hence we can see that the emitted power has peak value which very well exceeds the allowed levels of emission. In order to avoid this peak emission powers, spread spectrum clocking allows us to distribute the clock frequency over a range of frequencies there by we could avoid harmonics and therefore peak power emissions. 

               There are 4 important parameters in the SSC, they are :

• Modulation index : amount of frequency (or spread) as a relative percentage of the input or the carrier frequency.

      Example : 1% spread means an input/carrier frequency of 100MHz is spreading from 99MHz to 101MHz.

• Modulation frequency : the rate at which the input or carrier frequency will change between the min and max range.

       Example : with 1% spread on input frequency of 100MHz, modulation frequency says the rate in which the frequency changes between 99 to 101MHz.

• Modulation profile : how the clock frequency is modulated between min and max frequency range.
• Spread type :  there are two types of spreads down spread or the center spread.

1.  down spread : the spread range is bellow the input frequency. from 98MHz to 100MHz for -2% down spread for above example.
2. center spread : the spread range distributes evenly with center as input frequency. 99MHz to 101MHz for 1% center spread.

How can we implement SSC ?  

ABOUT PLL (Phase Locked Loop)

       The Phase locked loop is a closed loop frequency control system based on the difference between the input clock signal and feedback clock signal from the VCO (Voltage Controlled Oscillator). Generally the PLL contains following components 

                    1. Phase and Frequency difference detector.

                    2. Voltage Controlled Oscillator.

                    3. Feedback Counter

                    4. Pre-scale Counter

                    5. Post-scale Counter

Phase and Frequency difference detector :

This circuit detects if the feedback clock signal is lagging or leading the input clock signal and generates an 'up' or 'down' signal. This Up or Down signal is used by the charge pump and VCO to align the phase and increase of decrease the output clock frequency.

The PFD outputs these “up” and “down” signals to a charge pump. If the charge pump receives an up signal, current is driven into the loop filter. Conversely, if it receives a down signal, current is drawn from the loop filter.

The loop filter converts these signals to a control voltage that is used to bias the VCO. Based on the control voltage, the VCO oscillates at a higher or lower frequency, which affects the phase and frequency of the feedback clock. If the PFD produces an up signal, then the VCO frequency increases. A down signal decreases the VCO frequency. The VCO stabilizes once the reference clock and the feedback clock have the same phase and frequency. The loop filter filters out jitter by removing glitches from the charge pump and preventing voltage over-shoot.

When the reference clock and the feedback clock phases are aligned then the PLL is considered to be locked.

A divide counter (M) is inserted in the feedback loop to increase the VCO frequency above the input reference frequency. VCO frequency (FVCO) is equal to (M) times the input reference clock (FREF). The PFD input reference clock (FREF) is equal to the input clock (FIN) divided by the pre-scale counter (N). Therefore, the feedback clock (FFB) applied to one input of the PFD is locked to the FREF that is applied to the other input of the PFD. The VCO output feeds post-scale counters which allow a number of harmonically related frequencies to be produced within the PLL.

The output frequency of the PLL is equal to the VCO frequency (FVCO) divided by the post-scale counter (C).

In the form of equations:

where:

• F_REF = F_IN / N

• F_VCO = F_REF × M = F_IN × M/N

• F_OUT = F_VCO / C = (F_REF × M) / C = (F_IN × M) / (N × C)

• F_VCO = VCO frequency

• F_IN = input frequency

• F_REF = reference frequency

• F_OUT = output frequency

• M = counter (multiplier), part of the clock feedback path

• N = counter (divider), part of the input clock reference path

• C = post-scale counter (divider)

ABOUT ARM

     ARM architecture is a RISC (Reduced Instruction Set Computing) based computing processor architecture developed and licensed by ARM Holdings (Advanced RISC Machines).  

     Reduced Instruction Set is mostly mistaken for few or lesser number of instructions. In fact it actually intends that the amount of work accomplished in an instruction is reduced which is unlike the CSIC (Complex Instruction Set Computing)which involves many memory cycles and compute cycles per instruction.

     ARM addresses wide range of market segments and there by has  categories of its processors as shown in the figure.

      

 Cortex A : Is a class of application processors which can 

execute complex Operating Systems such as Android, linux/crome , Microsoft Windows. This class of processors integrates a Memory Management Unit (MMU) to manage the memory requirements of these complex OSs and enable the download and execution of third party software. Applications where they are used are

• Smartphones
• Feature Phones
• Tablets / eReaders
• Advanced Personal Media Players
• Digital Television
• Set-top Boxes & Satellite Receivers
• High-End Printers
• Personal Navigation Devices
• Server
• Enterprise

 Cortex R : Is an Embedded Real time processor which often execute Real Time Operating System (RTOS)alongside user-developed application code requiring only a Memory Protection Unit (MPU) as opposed to the MMU available in the Application Processors. Applications where they are used are

• Automotive Control Systems
• Wireless and Wired Sensor Networks
• Wireless base station infrastructure
• Mass Storage Controllers
• Printers
• Network Devices

 Cortex M : Embedded Processors can provide an optimum solution for very low-power embedded computing applications. Often provided as a “black box” with pre-loaded applications, they have limited capability to expand hardware functionality and in most cases no screen. Applications where they are used are

• Merchant MCUs
• Automotive Control Systems
• Motor Control Systems
• White Goods controllers
• Smart Meters
• Sensors
• Internet of Things

  

SecureCore : A number of SecurCore™ processors are available enabling Partners to choose the solution that fits the specific criteria of their application based on desired performance, die area, size, dynamic and static power, and other considerations.

SecurCore applications include:

• SIMs
• Smart Cards
• Advanced Payment Systems
• Electronic Passports
• Electronic Ticketing
• and Transportation